Prof Susmit Sarkar

Director of Research

Professor

Phone: +44 (0)1334 46 1631
Email: Susmit.Sarkar@st-andrews.ac.uk

Biography

I am a Professor in Computer Science at the University of St Andrews, and have been here at St Andrews since 2013. Before this, I did postdoctoral work at the University of Cambridge, and obtained my PhD from Carnegie Mellon University. I am a Honorary Fellow at the School of Informatics of the University of Edinburgh, a Fellow of the British Computer Society (BCS), and a Senior Member of the Association of Computing Machinery (ACM).

My research interests are in concurrent and low-level software, and the software-hardware interface (others call this Architecture, or ISA-level). I have done work on memory consistency models, shared memory, dependent types, certified code, parallel cost models, and parallel code refactoring. My work has contributed to the understanding of the ARM, IBM POWER, x86, RISC-V architectures, the C, C++ and Java programming languages. I have served as an invited expert for the RISC-V architecture definition effort, published and reviewed extensively for leading journals and conferences (PLDI, POPL, TOPLAS, ICFP), and reviewed/been on panels for the EPSRC/ERC/ANR(France).

Teaching

This academic year (2023-24) I am teaching:

CS3050: Logic and Reasoning
CS4204: Concurrency and Multi-Core Architectures
CS5031: Software Engineering Practice

In the past, I have taught modules at different levels, including:

CS3052: Computational Complexity
IS5102: Database Management Systems
CS2006: Advanced Programming Projects

I also supervise project students at various levels in the school.

Outside St Andrews: I have delivered short courses and tutorials at a variety of venues, most recently An Introduction to Reasoning with Weak Memory at the Scottish Programming Languages and Verification Summer School 2022 (SPLV'22).

Research areas

My research interests are in specifying, validating, and verifying concurrent software and hardware. I particularly enjoy working at the hardware-software interface (low-level software/architecture-level hardware). Here I have worked extensively on the problem of memory consistency models, for architectures such as ARM, IBM POWER, RISC-V, and for low-level programming languages such as C/C++. I have pushed both down and up the stack, for example working on verification of cache protocols, of high-level parallel algorithmic skeletons, and on refactoring.

Selected publications

Open access

Compound memory models
Goens, A., Chakraborty, S., Sarkar, S., Agarwal, S., Oswald, N. & Nagarajan, V., 6 Jun 2023, In: Proceedings of the ACM on Programming Languages. 7, PLDI, 24 p., 153.
Research output: Contribution to journal › Article › peer-review
Open access

Fast and correct load-link/store-conditional instruction handling in DBT systems
Kristien, M., Spink, T., Campbell, B., Sarkar, S., Stark, I., Franke, B., Böhm, I. & Topham, N., 2 Oct 2020, CASES '20: Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems. IEEE Computer Society, Vol. Early Access. 11 p. (IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems; vol. 39, no. 11).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open access

Simplifying ARM concurrency: multicopy-atomic axiomatic and operational models for ARMv8
Pulte, C., Flur, S., Deacon, W., French, J., Sarkar, S. & Sewell, P., 1 Jan 2018, Proceedings of the ACM on Programming Languages (POPL '18). New York: ACM, p. 1-29 29 p. 19. (Proceedings of the ACM on Programming Languages; vol. 2, no. POPL).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open access

Verification of a lazy cache coherence protocol against a weak memory model
Banks, C., Elver, M., Hoffmann, R., Sarkar, S., Jackson, P. & Nagarajan, V., 2 Oct 2017, Proceedings of the 17th Conference on Formal Methods in Computer-Aided Design (FMCAD 2017). Stewart, D. & Weissenbacher, G. (eds.). FMCAD Inc, p. 60-67
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open access

Mixed-size concurrency: ARM, POWER, C/C++11, and SC
Flur, S., Sarkar, S., Pulte, C., Nienhuis, K., Maranget, L., Gray, K., Sezgin, A., Batty, M. & Sewell, P., 1 Jan 2017, Proceedings of the 44th annual ACM-SIGPLAN Symposium on Principles of programming languages (POPL 2017). Fluet, M. (ed.). New York: ACM, p. 429-442 14 p. (ACM SIGPLAN Notices; vol. 52, no. 1).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open access

Fence placement for legacy Data-Race-Free programs via synchronization read detection
McPherson, A. J., Nagarajan, V., Sarkar, S. & Cintra, M., 7 Jan 2016, In: ACM Transactions on Architecture and Code Optimization (TACO). 12, 4, 23 p., 46.
Research output: Contribution to journal › Article › peer-review
Open access

Farms, pipes, streams and reforestation: reasoning about structured parallel processes using types and hylomorphisms
Castro, D., Hammond, K. & Sarkar, S., 4 Sept 2016, Proceedings of the 21st ACM SIGPLAN International Conference on Functional Programming (ICFP 2016). New York, NY: ACM, p. 4-17 14 p. (ACM SIGPLAN Notices; vol. 51, no. 9).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open access

Modelling the ARMv8 architecture, operationally: concurrency and ISA
Flur, S., Gray, K., Pulte, C., Sarkar, S., Sezgin, A., Maranget, L., Deacon, W. & Sewell, P., 11 Jan 2016, Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL '16). Gill, A. (ed.). New York: ACM, p. 608-621 14 p. (ACM SIGPLAN Notices; vol. 51, no. 1).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open access

An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors
Gray, K., Kerneis, G., Mulligan, D., Pulte, C., Sarkar, S. & Sewell, P., 5 Dec 2015, MICRO-48 Proceedings of the 48th International Symposium on Microarchitecture . New York, NY: ACM, p. 635-646 12 p.
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Synchronising C/C plus plus and POWER
Sarkar, S., Memarian, K., Owens, S., Batty, M., Sewell, P., Maranget, L., Alglave, J. & Williams, D., 1 Jun 2012, In: ACM SIGPLAN Notices. 47, 6, p. 311-321 11 p.
Research output: Contribution to journal › Article › peer-review

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