CS4204 Concurrency and Multi-Core Architectures
Academic year
2024 to 2025 Semester 2
Curricular information may be subject to change
Further information on which modules are specific to your programme.
Key module information
SCOTCAT credits
15
SCQF level
SCQF level 10
Availability restrictions
Not automatically available to General Degree students
Planned timetable
To be arranged.
Module Staff
TBC Module coordinator(s): Honours Coordinator - Computer Science (hons-coord-cs@st-andrews.ac.uk)
Module description
This module presents the key concepts of programming multi-core/many-core and other parallel architectures, ranging from the identification and use of parallel patterns; the use of structured parallelism to implement task and data parallelism; key implementation issues, including task identification, granularity, scheduling, threads, garbage collection, task placement, locality; performance monitoring and debugging.
Relationship to other modules
Pre-requisites
BEFORE TAKING THIS MODULE YOU MUST PASS CS3052 AND PASS CS3104
Assessment pattern
3-hour Examination = 40%, Coursework = 60%
Re-assessment
3-hour Examination = 40%, Coursework = 60%
Learning and teaching methods and delivery
Weekly contact
2 hr x 11 weeks lectures, 1 hr x 6 weeks tutorial/discussion.
Scheduled learning hours
28
Guided independent study hours
122