MOSFETs are similar to the J-FETs we looked at earlier, but they're manufactured using a different technique and behave slightly differently. Here we'll concentrate on a type of transistor called the enhancement mode MOSFET, but note there's another ‘flavour’ of MOSFET which we'll ignore called the depletion mode type. MOSFET stands for Metal-Oxide-Silicon Field-Effect-Transistor.
Enhancement mode means that the applied gate voltage increases or ‘enhances’ the ability of the transistor to pass an drain-source current. This is the opposite way around to a J-FET where increasing the gate voltage tends to reduce the drain-source current which will flow when we don't apply a specific gate voltage.

Figure 9.4 illustrates how an N-channel enhancement MOSFET works. The transistor differs from the J-FET in two ways. Firstly, the gate electrode is placed on top of a very thin insulating layer (of oxide — hence the ‘oxide’ in the name) which means it isn't in direct electrical contact with the rest of the transistor. Secondly, the device is made without manufacturing an N-type doped channel between the source and drain. Instead, there are a pair of small N-type regions just under the drain & source electrodes. As a result, when the gate source voltage Vgs = 0 , then Ids = 0 no matter what drain-source voltage we apply.

If we apply a positive voltage to the gate we'll set up an electrostatic field between it and the rest of the transistor. The positive gate voltage will push away the ‘holes’ inside the p-type substrate and attracts the moveable electrons in the n-type regions under the source & drain electrodes. This produces a layer just under the gate's insulator through which electrons can get into and move along from source to drain. The positive gate voltage therefore ‘creates’ a channel in the top layer of material. Increasing the value of the positive gate voltage pushes the p-type holes further away and enlarges the thickness of the created channel. As a result we find that the size of the channel we've made increases with the size of the gate voltage and enhances or increases the amount of current which can go from source to drain — this is why this kind of transistor is called an enhancement mode device.

The above explanation is based on using n-type patches at source & drain in a p-type substrate. The resulting transistor behaves as if the gate voltage creates a channel of n-type material, hence it's called an ‘n-channel’ device. It's possible to build devices the ‘other way around’ where p-type patches are used in an n-type substrate. These behave in a similar way, but they pass current when a negative gate voltage creates an effective p-type channel layer under the insulator. By swapping around p-type for n-type we can make pairs of transistors whose behaviour is similar except that all the signs of the voltages and currents are reversed. Pairs of devices like this care called complimentary pairs. Figure 9.5 illustrates the behaviour of a typical complimentary pair of power MOSFETs made by Hitachi for use in hi-fi amplifiers.

Note that with a n-channel device we apply a +ve gate voltage to allow source-drain current, with a p-channel device we apply a -ve gate voltage. (In fact, most kinds of transistor can be made in ‘either polarity’ to build complimentary devices.) One nuisance of using MOSFETs is that a variety of circuit symbols are used for each device. Figure 9.5 shows two common symbols for the p-type & n-type MOSFET. You'll also discover others in electronics books & catalogues. This is confusing & annoying, but we seem to be stuck with it. In part, its a reflection of the fact that MOSFETs come in many types & are more complex than the simple description given here admits. Alas, its also because electronic engineers haven't ‘got their act together’ and all agreed to use the same symbols. Don't worry if you can't remember all the symbols. Just remember that there are basically two kinds of enhancement MOSFET & that they behave as indicated in figure 9.5.



Content and pages maintained by: Jim Lesurf (jcgl@st-and.ac.uk)
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University of St. Andrews, St Andrews, Fife KY16 9SS, Scotland.