hd1.gif - 27Kb

In the part 12 we saw how it is possible to create signals which carry information by modulating the frequency or phase of a carrier wave. Here we'll examine how it is possible to Demodulate these signals and recover the information. Note that although we'll concentrate on FM demodulation, similar methods are useful for general measurements of signal frequencies and for PM demodulation.


13.1 The Double-Balanced Mixer.
The most popular ‘electronic’ method for FM/PM demodulation is the Phase Locked Loop (PLL). To see how this works we must first explain one of its elements — the Double Balanced Mixer (DBM).

fig1a.gif - 16Kb

Figure 13.1a shows the circuit diagram for a DBM. It consists of four diodes linking two transformers. There are three ways or ports by which signals can get in/out of the DBM. It is conventional to call these the RF, LO, and IF ports since DBM's are often used as mixers in heterodyne systems. To see how the system works we can start by considering the LO port. This lets us apply a voltage between the points A and B in the circuit.

fig1b.gif - 12Kb


When we apply a voltage which makes A positive with respect to B (which we'll assume occurs when ) the diodes, , will conduct and , will not. This means that & will present a very low resistance to any signals and & will present a very high resistance. As a result, the circuit will behave like 13.1b. The two transformers will be ‘directly’ connected together via the conducting diodes. Using 1:1 transformers and low-loss diodes we therefore find that, when is positive, (for a.c. signals, of course!).

fig1c.gif - 12Kb


When we apply an LO voltage such that A is negative compared to B we can use a similar argument to show that, in this case, the circuit behaves like 13.1c. Hence when is negative, . We can therefore use the DBM as a sort of ‘switch’ to control whether we pass on the the signal unaffected or invert it by applying the required polarity of .

In practice, a real DBM requires a given minimum amplitude of LO voltage to ensure the diodes have ‘turned on/off’ properly. For typical silicon or GaAs diodes this usually means we need about 1 Vptp of LO at the diodes. DBM's of this type can be used for frequencies from below 1 MHz to tens of GHz. Equivalent arrangements (using other items in place of ordinary transformers) can be used at mm-wave & THz frequencies.


13.2 The Phase Lock Loop.
In a PLL, the DBM is used in combination with a low pass filter (or time constant) as a Phase Detector. To understand how this works, consider the situation illustrated in figure 13.2.

fig2.gif - 20Kb

Here an input signal

equation

is mixed with an LO of

equation
These produce an output

equation

equation

The output low-pass filter smooths over a number of cycles to produce an output whose average level can be worked out by integrating over one cycle and dividing by the cycle period. (Since every cycle is just like the others this gives the same result as averaging over many cycles.) i.e. we can say that

equation

which produces the simple result

equation

The amount by which the output ‘ripples’ up and down above this average value will depend upon the details of the low pass filter. Here we can ignore this ripple and just assume that we get an output proportional to the input level's amplitude multiplied by the cosine of the phase offset, j, between the signal and lo inputs to the DBM. The system therefore provides an output which depends upon this phase.

fig3.gif - 14Kb

Having established the use of the DBM we can now consider the PLL illustrated in figure 13.3. Here the input is an FM wave

equation

whose carrier (unmodulated) frequency is and whose modulation is represented by the time varying phase

equation

where is the modulation pattern we wish to recover and is the FM modulator's voltage to frequency conversion gain value. The LO input to the DBM comes from a VCO and can, in a similar way, be represented as

equation

where

equation

and is the control voltage which sets the VCO's output frequency at any instant. is the VCO's frequency to voltage conversion gain value. The output from the DBM, smoothed by the low pass filter, will therefore be

equation

For reasons which should become clear later the loop functions by attempting to adjust the LO output so that its phase is always approximately out of phase with the input signal — i.e. it tries to ensure that the two are in quadrature. It is therefore convenient to rewrite 13.10 as

equation

where

equation

is called the phase error between the input signal and VCO output. (Note that this is actually the angle by which they depart from being in quadrature.) For similar reasons it is conventional to call the error voltage produced by the phase detector since it is a voltage which indicated the magnitude and sign of the phase error.

Now the input voltage controlling the VCO will be

equation

where is the voltage gain of the amplifier which follows the low pass filter. We can therefore say that

equation

Putting this into 13.12 and differentiating we can obtain

equation

which, using 13.11 is equivalent to

equation

When the system is ‘phase locked’ we should find that the signal and LO are almost in quadrature, i.e. . We can therefore assume that and simplify 13.16 into

equation

where

equation

is called the Phase Lock Loop's Loop Gain.

The output from the PLL will be

equation

i.e.

equation

If we observe an output voltage

equation

the phase error must therefore be

equation

Putting this into 13.17 we can say that

equation

However, from 13.7 we can expect that

equation

Combining these expressions we obtain

equation

By using a system which has a very high loop gain we can ensure that

equation

and this means that

equation

i.e. we finally discover that

equation

This result shows that the PLL's output voltage varies in proportional with modulation, , we wish to demodulate provided that two conditions are satisfied:

A more general explanation of the PLL's behaviour is that it continuously adjusts the VCO output to maintain phase quadrature. Any change in the input FM wave's frequency or phase tends to produce a DBM output which causes the VCO to ‘track’ the input. For the two to maintain a constant phase relationship they must keep ‘in step’ — i.e. their frequencies must always be the same. Since the VCO's frequency depends upon the control voltage, , it follows that this voltage varies in proportion with the FM wave's frequency. Hence the variations of provide us with the demodulated pattern we require. The PLL we've considered is called a simple First Order loop. More complex types of loop also exist. These often work better but are harder to analyse. Their basic operation is the same as the system we've considered.

The PLL has some interesting features. The most useful of these is that it largely ignores fluctuations in the amplitude of the input FM wave. (You can see this is true because expression 13.28 doesn't include the input wave's amplitude, .) This means that the PLL FM demodulator tends to ignore any unwanted interference which appears alongside the input signal. The loop is said to have the property of AM Rejection.

Of course, the system can't work perfectly for any input signal size, no matter how small. The loop gain does depend upon , so if the FM wave's amplitude is too small we can't assume that the gain is very large. Looking back at 13.25 we can find that a low input signal amplitude has four effects:-

For this reason we usually try to ensure that the input wave's amplitude is ‘big enough’ to avoid these problems.

The above analysis assumed that the VCO could always adjust its output to ‘track’ any changes in the FM wave's frequency. This is the same as assuming that the low pass filter isn't affecting the DBM's output. In reality, a low pass filter will tend to attenuate (and phase shift) any swiftly changing signals. As a result, the above arguments only strictly apply for a system which is locked (the signal and VCO maintain a steady phase relationship) when the modulation frequency is ‘low’ (i.e. passes through the filter without being affected).

Consider for a moment what happens when we start with the PLL not locked to an input signal. The input and VCO frequencies will differ by some amount so the output from the DBM (averaged over a few cycles of carrier) will be

equation

i.e. the output from the DBM tends to oscillate at the difference frequency, . Provided that is low enough this variation can pass through the low pass filter the loop can use this to help it lock onto the input wave. This brings the two frequencies together, and removes this ‘beating’ effect. However, if the difference frequency is too high to get through the low pass filter the DBM's output won't be communicated to the VCO. The PLL then can't lock onto the input FM wave and essentially ignores it! As a result, the system can only lock onto an input and demodulate it if the signal frequency is such that where B is the bandwidth of the filter. The system is said to have a Lock in range of set by the choice of the loop filter. A loop ‘free running’ at a frequency, , will therefore ignore signals outside the range .

Consider now what happens when we start with a situation where the system has locked onto a signal whose frequency equals the PLL's unlocked value, . By definition this is the frequency which the VCO produces when the control voltage, . If we now slowly increase (or decrease) the frequency of the input signal we will produce a corresponding increase (or decrease) in as the loop makes the VCO output track the signal. However, this process can't go on forever. If we keep on changing the signal frequency one of two things will eventually happen:

Any further increase now can't produce a corresponding change in the VCO output. Instead, the loop will ‘fall out of lock’. Which of the above possibilities occurs will depend upon the details of how the loop is built. In either case, the effect produces a finite Tracking range. The loop, once locked, can follow an FM signal over a given tracking range, but will lose lock if the signal moves outside this range.

An important feature of PLL's is that the lock-in range and the tracking range are set by different aspects of the system. Hence their values can be designed separately.




Content and pages maintained by: Jim Lesurf (jcgl@st-and.ac.uk)
using TechWriter Pro and HTMLEdit on a RISCOS machine.
University of St. Andrews, St Andrews, Fife KY16 9SS, Scotland.